Motivation
Actually I were familiar with the arm architecture , even MIPS architecture many years ago. i think first 3 years when i start working.
At that time, I need do the board birngup work Which need a deep understanding about the CPU architecture and corresponding instruction set.
I think I have better understanding for the MISP even than ARM. On the first 2 years of work, all SoCs we are using were MISP architecture.
Because i would like to have better understanding about QNX startup code. To read the every line of the code, I need do some warmup for the arm64 instruction set. Here I will only focus on the ARM64 but not talking about any 32bit thing.
ARM64 Registers
There are 2 major type of registers of ARM64. One is general purpose registers, another is system registers.
General purpose registers
ARM64 instructions are executed on registers, Such as to add 2 values and get the result. Those registers will be used to load the values for the operation and store for result.
It provides 31 general purpose registers. Each register can be used as a 64-bit X register (X0..X30), or as a 32-bit W register (W0..W30).\
For example:
// x0 = x0 % 37
mov x1, 37
udiv x2, x0, x1
msub x0, x2, x1, x0
System registers
System registers are used to configure the processor and to control systems such as the MMU and exception handling.
It cannot be used directly by data processing or load/store instructions. Instead, the contents of a system register need to be read into an X register, operated on, and then written back to the system register. There are two specialist instructions for accessing system registers:
To load the system register to X register :
MRS Xd, <system register>
To restore the value from X registers to system register:
MSR <system register>, Xn
Please note that there are 4 exception levels of ARM64. So There are system register for specific EL.
For example the TTBR0(Translation Table Base Register 0) system register. There are TTBR0_EL1, TTBR0_EL1 and TTBR0_EL3.
But how many system register there are ?
You can find a system register list from here
The other type registers
SP : stack pointer
It is for the base address for loads and stores. We know that it needs stack to execute C program. So we will see in the bootload code, before it jumps from ASM code to C, it must set the SP register.
There are SP for each Exception level.
LR
X30 is used as the Link Register and can be referred to as LR. Separate registers, ELR_ELx, are used for returning from exceptions, for corresponding exception level.
PC
It is the Program Counter.
Calling convention for general purpose registers
Well, we have 31 general purpose registers. When a program to be loaded and executed, can we freely and no limitation to use X0 - X30 ?
Actually there is Calling convention defined which is better for us to understand :
x0 – x7
Used to pass parameters and return values. The value of these registers may be freely modified by the called function (the callee) so the caller cannot assume anything about their content, even if they are not used in the parameter passing or for the returned value. This means that these registers are in practice caller-saved.
x8 – x18
Used as temporary registers for every function. No assumption can be made on their values upon returning from a function. In practice these registers are also caller-saved.
x19 – x28
If used by a function, must have their values preserved and later restored upon returning to the caller. These registers are known as callee-saved.
x29
It can be used as a frame pointer and x30 is the link register. The callee should save x30 if it intends to call a subroutine.
Reference links
A Guide to ARM64 / AArch64 Assembly on Linux … ..
AArch64 architectural system register summary